let GF be non empty right_complementable well-unital distributive Abelian add-associative right_zeroed associative doubleLoopStr ; :: thesis: for V being non empty right_complementable vector-distributive scalar-distributive scalar-associative scalar-unital Abelian add-associative right_zeroed ModuleStr over GF

for v being Element of V

for L being Linear_Combination of V holds

( L . v = 0. GF iff not v in Carrier L )

let V be non empty right_complementable vector-distributive scalar-distributive scalar-associative scalar-unital Abelian add-associative right_zeroed ModuleStr over GF; :: thesis: for v being Element of V

for L being Linear_Combination of V holds

( L . v = 0. GF iff not v in Carrier L )

let v be Element of V; :: thesis: for L being Linear_Combination of V holds

( L . v = 0. GF iff not v in Carrier L )

let L be Linear_Combination of V; :: thesis: ( L . v = 0. GF iff not v in Carrier L )

thus ( L . v = 0. GF implies not v in Carrier L ) :: thesis: ( not v in Carrier L implies L . v = 0. GF )

hence L . v = 0. GF ; :: thesis: verum

for v being Element of V

for L being Linear_Combination of V holds

( L . v = 0. GF iff not v in Carrier L )

let V be non empty right_complementable vector-distributive scalar-distributive scalar-associative scalar-unital Abelian add-associative right_zeroed ModuleStr over GF; :: thesis: for v being Element of V

for L being Linear_Combination of V holds

( L . v = 0. GF iff not v in Carrier L )

let v be Element of V; :: thesis: for L being Linear_Combination of V holds

( L . v = 0. GF iff not v in Carrier L )

let L be Linear_Combination of V; :: thesis: ( L . v = 0. GF iff not v in Carrier L )

thus ( L . v = 0. GF implies not v in Carrier L ) :: thesis: ( not v in Carrier L implies L . v = 0. GF )

proof

assume
not v in Carrier L
; :: thesis: L . v = 0. GF
assume A1:
L . v = 0. GF
; :: thesis: not v in Carrier L

assume v in Carrier L ; :: thesis: contradiction

then ex u being Element of V st

( u = v & L . u <> 0. GF ) ;

hence contradiction by A1; :: thesis: verum

end;assume v in Carrier L ; :: thesis: contradiction

then ex u being Element of V st

( u = v & L . u <> 0. GF ) ;

hence contradiction by A1; :: thesis: verum

hence L . v = 0. GF ; :: thesis: verum